Fpga Based Cipher Design & Implementation of Recursive Oriented Block Arithmetic and Substitution Technique (robast)

Proposed FPGA based technique considers a message as a binary string on which ROBAST is applied. A block of n-bits is taken as an input stream, where n ranges from 8 to 256 – bit, then ROBAST is applied in each block to generate intermediate stream, any one intermediate stream is considered as a cipher text. The same operation is performed repeatedly on various block sizes. It is a kind of block cipher and symmetric in nature hence decoding is done in similar manner. This paper also presents an efficient hardware realization of the proposed technique using state-of-the-art Field Programmable Gate Array (FPGA). The technique is also coded in C programming language and Very High Speed Integrated Circuit Hardware Description Language (VHDL). Various results and comparisons have been performed against industrially accepted RSA and TDES. A satisfactory results and comparisons are found.


I. INTRODUCTION
Transmission of sensitive electronic information [7] from and all around the globe has emphasizes the need of fast & secure network [2,3,5].For achieving this secrecy, integrity and confidentiality, cryptographic techniques [1,2,3,14] are the tools.To achieve high performance it is highly recommended to implement the cryptographic techniques in hardware.A promising solution that combines high flexibility with the speed and physical security of Application Specific Integrated Circuits (ASIC) [7,8,9,10] is the implementation of cryptographic technique on state-of-the-art re-configurable devices such as Field Programmable Gate Array (FPGA) [7,8,9,10].Sub-Section A, discussed the framework of the scheme along with private/symmetric key cryptosystem [4,7].
[1,2,14], D, is performed similarly in case of symmetric or the opposite in other private key algorithms.The Session Key [1,2,14], K must be sent through a secured channel and cipher text, Y, may be sent through unsecured channel.Cryptanalyst [1,2,7,14] are the entity who attempts to discover plain text, X, and or key, K.
The Section II illustrates the principle of ROBAST, Section III gives the key generation process, result and simulations are given in Section IV, A brief analysis is given in Section V, Section VI draws the conclusion and finally the list of the references are given.

II. PRINCIPLE OF ROBAST
The message can be considered as blocks of bits with different block size [1,7,14] like 8, 16, 32, 64, 128 & 256 bits.The rules to be followed for generating a cycle are as follows: 1. Consider any source stream [1,2,7,14] containing finite number of bits (where N=2 n , n =3 to 8) and divide it into two equal parts.
2. Make the source stream into paired form so that a pair can be used for the operation.
3. Perform the modulo-4 addition [6,13] between the first and second pair, second and third pair, and so on of the source stream, to obtain the first intermediate block.
4. The same process is repeated recursively [7,11,12] between second and first, third and second, fourth and third and so on of the source stream, to generate the next intermediate block.
This process is repeated until the source stream is generated.After a finite number of iterations source stream is regenerated.So, decryption is basically the iteration of the same process.In this proposed technique the modulo addition with substitution and permutation is given but to enhance the security further other arithmetic operations has also been implemented in this technique.Sub-Section A illustrates the scheme numerically and that of Sub-Section B outlines the implementation issues.http://ijacsa.thesai.org/

B. Implementation of ROBAST
The technique executes modulo addition between two blocks, the first iteration performs in forward basis and then backward operation is performed.Next, final permutation is done to get the final cipher text.This technique has been implemented in C [11, 12,13] and then feasibility study has been performed.Finally, FPGA [8,9,10] based implementation has been done in VHDL [8,9,10].In both implementation, the technique takes input from file as a source stream and encryption is performed.The cipher text generated is finally written in another file [7,10,11,12].The data blocks (8, 16, 32, 64, 128 and 256-bits) from the input file have been stored in array.Then encryption is performed and also stored in array.The reading and writing of data from and in file is based on 8bit ASCII codes [7,11,12].XilinX [8,9,10] software has been used for writing codes in VHDL.The encryption/decryption entity input bit vector (16-bit), output bit vector (16-bit), key bit vector (8-bit) and EN_DN signal.If EN_DN = 1 then encryption is performed else decryption is performed.Figure 3 gives the main ROBAST entity coded in VHDL.
The above operations discussed are substitute technique [6,7,13] followed by permutation technique [6,7,13] has been performed by orientation of bits based on the session key.Therefore, these resultant blocks of stream can be considered as cipher text.

III. THE KEY GENERATION PROCESS
The key generation process depends on block size, iteration of each block and final permutation performed.Thus, in the proposed scheme, eight rounds have been considered, each for 2, 4, 8, 16, 32, 64, 128, and 256-block size.As mentioned in Section II, each round is repeated for a finite number of times and the number of iterations will form a part of the encryptionkey.Although the key may be formed in many ways, for the sake of brevity it is proposed to represent the number of iterations in each round by a 16-bit binary string.The binary strings are then concatenated to form a 128-bit key for a particular key.Example in Sub-Section A illustrates the key generation process.Sub-Section B describes the modulo addition, which is an important operation in the technique and should be taken into account while forming the session key.

A. Example
Consider a particular session where the source file is encrypted using iterations for block sizes 2, 4, 8, 16, 32, 64, 128, and 256 bits, respectively.Table I shows the corresponding binary value [7,8,10,13] for the number of iterations in each round.The binary strings are concatenated together to form the 128-bit binary string: 110000110110010111000010110011101011111100110110 10101101100110111011010010101010000100001110000100 000010101100100000000001001000.http://ijacsa.thesai.org/This 128-bit binary string will be the encryption-key for this particular session.During decryption, the same key is taken to iterate each round of modulo-subtraction for the specified number of times and reverse permutation.

B. Modulo Addition
An alternative method for modulo addition is proposed here to make the calculations simple.The need for computation of decimal equivalents of the blocks is avoided here since it may generate large decimal integer values for large binary blocks.The method proposed here is just to discard the carry out of the MSB after the addition to get the result.For example, if we add 1101 and 1001 we get 10110.In terms of decimal values, 13+9=22.Since the modulus of addition is 16 (24) in this case, the result of addition should 6 (22-16=6).Discarding the carry from 10110 is equivalent to subtracting 10000 (i.e.16 in decimal).So the result will be 0110, which is equivalent to 6 in decimal.The same is applicable to any block size.

IV. RESULTS AND SIMULATION
Any cryptographic technique is to be accepted, a satisfactory results are very much required.Proposed technique has been tested for feasibility both in terms of algorithmic parameters and cryptographic parameters.Sub-Section A gives the time complexity results [7,11,12,13], Sub-Section B tests for non-homogeneity using Chi-Square values [1,6,14,15] and degree of freedom [1,6,14,15], Sub-Section C illustrates the frequency distribution [1,6,14,15] of ASCII characters [7,11,12], Sub-Section D test for cryptanalysis using avalanche ratio [2,3,4,5] and finally Sub-Section E gives the FPGA-based simulation results [8,9,10].All these results are against well known and industrially accepted RSA and TDES [1,2,3,4,13,14].For the shake of brevity 20 (twenty) sample files of different types has been taken for these results.The Section V briefly analyses all these results.

A. Time Complexity
Time complexity is based on encryption time and decryption time [1,2,14].Encryption time is the time required to encrypt a source file and decryption time is the time to decrypt the cipher text file to get the original file.Table II gives the time complexities and Figure 4 illustrates the same.This test is in terms of efficient algorithmic parameter.

B. Tests for Non-Homogeneity
Test for non-homogeneity has also been done using Chi-Square value and degree of freedom; this is one of the important cryptographic parameters.Chi square value is the statistical value between source file and encrypted files, which gives the difference.Degree of freedom in the character distribution of the above said files.Table III gives the Chi-Square value and Figure 5 illustrates the same.

C. Frequency Distribution
The frequency distribution is the distribution of the all-256 ASCII characters in the respective files.This is also a cryptographic parameter, which measures the degree of cryptanalysis. Figure 6 illustrates the various frequency distribution results found after implementation of respective algorithms/techniques.

D. Avalanche Ratio
The avalanche ratio is the ratio between the modified results to the original result.The avalanche ratio is obtained by modifying 2-3 bits/bytes in the encryption key as well as in source files.It"s a strong cryptographic parameter and this may be conceptualize with the avalanche occurs in hill area.Table IV gives the avalanche ratio values of ROBAST.

E. FPGA-Based Simulation Result
This Section gives some of the results found after implementing the proposed technique in VHDL.This code has been simulated and synthesized in XilinX.The main objective is to find an efficient FPGA-based cryptographic technique for implementation in embedded systems.The Figure 7 gives the RTL schematic [8,9,10] of the proposed technique and the Figure 8 gives the chip diagram for Spartan 3E [8,9,10].

V. ANALYSIS OF THE RESULTS
Analyzing all the results presented in the result Section(s), following are the points obtained on the proposed technique: 1.The encryption time and decryption time varies linearly with the file sizes.Also the time complexity of ROBAST is quite less than RSA, but it"s slight less than TDES.
2. Considering the Chi-Square values, the proposed technique, ROBAST, is most non-homogeneous than that of RSA and TDES.But, there is no substantial result found in terms of degree of freedom because all three (ROBAST, RSA, TDES) have almost same value.
3. Result for the frequency distribution illustrates the ASCII characters are well distributed in ROBAST.The well distribution was also found for RSA and TDES.So, the frequency distribution result is at par with that found in Chi-Square and degree of freedom values.

Figure 1 :
Figure 1: Model of Conventional Cryptosystem A. Example Consider the block S = 10010011 of size 8 bits.The Flow diagram to show how positions of the bits of S and the different intermediate blocks can be reoriented with the key values to complete the cycle is shown in figure 2. In this diagram, each arrow indicates positional orientation of a bit during iteration.Therefore the final cipher text is S"=00011001.

Figure
Figure 2: Flow Diagram of proposed technique, ROBAST

Figure 3 :
Figure 3: ROBAST Entity and its function

Figure 6 (
Figure 6 (A): Frequency distribution of Source File

4 .
A very good result has been obtained in the avalanche ratio of the proposed technique.The average avalanche ratio is 94.84.So, cryptanalysis is quite difficult.5.The RTL diagram signifies that the proposed techniquehas been successfully implemented in VHDL and the same is illustrated for Spartan 3E FPGA.If we closely look at, there are 29 Look-Up-Tables (LUT s)[8,9] used for this technique.

Figure 8 :
Figure 8: Spartan 3E Schematic Sub-Section A. gives the application of this proposed technique, ROBAST and along with future scope of work.

TABLE III .
CHI-SQUARE AND DEGREE OF FREEDOM VALUES