Implementation and performance analysis of Video Edge Detection system on Multiprocessor Platform

This paper presents an agile development, implementation of Edge Detection on SMT8039 based Video And Imaging module. With the development of video processing techniques its algorithm becomes more complicated. High resolution and real time application cannot be implemented with single CPU or DSP. The system offers significant performance increase over current programmable DSP-based implementations. This paper shows that the considerable performance improvement using the FPGA solution results from the availability of high I/O resources and pipelined architecture. FPGA technology provides an alternative way to obtain high performance. Prototyping a design with FPGA offer some advantages such as relatively low cost, reduce time to market, flexibility. Another capability of FPGA is the amount of support of logic to implement complete systems/subsystems and provide reconfigurable logic for purpose of application specific based programming. DSP’s to provide more and more power and design nearly any function in a large enough FPGA, this is not usually the easiest, cheapest approach. This paper designed and implemented an Edge detection method based on coordinated DSP-FPGA techniques. The whole processing task divided between DSP and FPGA. DSP is dedicated for data I/O functions. FPGA’s task is to take input video from DSP to implement logic and after processing it gives back to DSP. The PS4R values of the all the edge detection techniques are compared. When the system is validated, it is observed that Laplacian of Gaussian method appears to be the most sensitive even in low levels of noise, while the Robert, Canny and Prewitt methods appear to be barely perturbed. However, Sobel performs best with median filter in the presence of Gaussian, Salt and Pepper, Speckle noise in video signal. Keywords-Multiprocessor platform; Edge detection; Performance evaluation; noise.


INTRODUCTION
Video processing has been used in many fields such as industry, military, medical image processing, surveillances recording etc. Video and imaging applications demand a range of processes to be performed in single applications.Edge detection is one of the basic characteristics of the image [1].It is an important basis for the field of image analysis such as: the image segmentation, target area identification, extraction and other regional forms .It is widely used in image segmentation, image recognition, and texture analysis of them.Edge detection [2] technology must not only detect the image gray value of the non-continuity, but also to determine their exact location .Although you can use multiple DSP's to provide more and more power and design nearly any function in a large enough FPGA, this is not usually the easiest, cheapest approach [3]- [6].The obvious result is to mix the two technologies benefits of co-processing.But DSP and FPGA designs are quite disparate disciplines, involving very different techniques, skills and tools [7] [8].But the differences in DSP and FPGA create obstacles to a fluid co-design process rather unpalatable to a specialist in one of the two fields and even more so to an expert of neither.Integrating the hardware [8]- [14] it also presents a significant amount of work that you could avoid if you stuck with just one technology.

II. EDGE DETECTION
Edge has two properties--the direction and the magnitude [1], [2].Usually the change of the gray level along the edge is flat, but the pixels perpendicular to the edge change dramatically.According to the characteristics of intensity change, it can be divided into step-type and roof-type.In step type, both sides of the pixel in value have changed significantly, and roof type, it is located in the gray scale to reduce the rate of change from the turning point.This paper introduces edge detection for video [10]- [16] on DSP-FPGA system i.e.SMT8039.These algorithms are based on the detection of discontinuities in the values of the grey levels of the image.The most widely used techniques are the generation of a differential image by means of Sobel, Prewitt, Robert, Canny and LOG operator [17]- [21].The characteristics of these operators, regularity and efficiency, make them adequate for its implementation in an application specific architecture.These operators [5] are based on the differential approach to edge detection.With this approach, a differential image G is generated from the original image F, where the changes in grey levels are accentuated.After this, the edges are detected [10]- [13] by means of the comparison of the amplitude values to a predefined threshold level.These are based on the gradient operator.The first derivative of the digital image is based on various approximations to the 2-D gradient.The gradient of the image f(x, y) at location (x, y) is defined as the vector.] 1/2 .The direction of the gradient vector also is an important quantity.Let α(x,y) represents the direction [1], [2] angle of the vector ∆f at (x, y) then from vector analysis:

∆݂ = ඌ
Computational of the gradient of an image is based on obtaining the partial derivatives ∂f/∂x and ∂f/∂y at every pixel location.The 3X3 area mask in Fig. 1 for Sobel in Fig. 2 and Prewitt in Fig. 3 operations mask of 3X3, and for Robert operation 2X2 mask is shown in Fig. 4 are used to convolve with each pixel values of the image For Sobel equation is For prewitt equation is And for Robert equation is In this formulation, the difference between the first and third rows of the 3X3 image region approximates the derivative in x-direction and the difference between the third and first columns approximates the derivatives in the y-direction.However this implementation is not always desirable because of the computational burden required by Squares and Square root.The equation is much more attractive computationally, and it still preserves relative changes in gray levels.The laplacian is not used in original form because its magnitude produces double edges.The purpose of this operator is to provide image with zero crossing used to establish the location of edges.

III. SYSTEM ARCHITECTURE
System architecture includes: 1. CCD camera for PAL or NTSC standard video input.
3. Video processing board is shown as dashed frame in Fig. 6.FPGA is used as logic unit.Virtex 4 FPGA is connected to the DSP's EMIF [4]

IV. DESIGN AND IMPLEMENTATION OF EDGE DETECTION SYSTEM ON SOFTWARE
The software 3L Diamond for SMT339 provides a model describing multiprocessor system as a no. of independent tasks that communicate together over a channel [4] [5].Weather these tasks are executing on DSP or FPGA Diamond manages the interconnection and programming so that you can concentrate on the application In this system, different module (tasks) are created.These connections are logically defined for communication between different tasks for DSP and FPGA [14][15] [21].In DSP, a Task Dsp_pal which is written in c language, In DSP, frames information like no. of input frames, no. of output frame, video memory [1] for channel A, B video capture registers, FIFO registers are defined in the library are imported, there are 3 video ports: Vp1 is used for input the video from the camera, Vp2 is undefined and video port Vp0 is used for displaying video on VGA display.For RGB656 format this involves a single EDMA channel, so DMA transfer 64 bit data and for YCbCr, it contains 3 separate channels for initialization.www.ijacsa.thesai.org

V. VIDEO EDGE DETECTION SYSTEM TESTS
In this paper we take a frame of video and we perform different edge detection techniques on this frame.In this we added noise like Gaussian, salt and pepper, speckle [22]- [25].In this paper, we estimate the effect of noise on different edge detection algorithms that which one is more sensitive to the noise, Original video frame is shown in Fig. 10.Fig. 11 shows effects of noise on different edge detection techniques at different PSNR values.We also compare the PSNR values of the all the edge detection techniques which are listed above with different kinds of noise levels and noise type [21] [26] [27].Out of five operators, Sobel edge detection method is found as the best in detecting the edges in noisy images.By applying median filter to the noisy image, noise is removed from the images and then all techniques are applied to filtered frame [28].So the paper concludes that Sobel edge detector with the Median filter performs well in detecting the edges, when compared to other edge detector with median filter [28]

Figure 3 .Figure 4 .
Figure 3.Prewitt matrix x and y directional [5].This allows high speed transfers to be initiated at request.The Module features a single Philips Semiconductors SAA7109AE/108AE video decoder/encoder that accept most PAL and NTSC standards, and can output processed images in PAL/NTSC or VGA (1280x1024, or HDTV Y/Cb/Cr) The DM642 has 128 Mbytes of high speed SDRAM (Micron MT48LC64M32F2S5) available onboard for image processing and an 8Mbytes FLASH device is fitted to store programs and FPGA configuration information.The function SAA7109AE/108AE is to change analog video signals from CCD into digital signal and the image data with the format of YUV 4:2:2 are stored in SDRAM.4.VGA display is used as displaying output Image.

Figure 5 .
Laplacian of Gaussian) 3D-plot (a) Image black is negative, gray is zero and white is positive.(c) Cross section showing zero crossing (d) 5x5 mask of LOG.

PS R in dB for Gaussian oise
[35]re PSNR is www.ijacsa.thesai.orgcalculatedbycomparing the mean of the pixel values with the mean of the additive Gaussian noise[29][23].The noise is multiplied by the proper scale so that it has a mean value of 0.016 for the 32 dB case.At this PSNR level, all methods return acceptable results.As the values of PSNR decreased, performance decreased[30]-[35].

TABLE II .
PS R