A Cost-effective Approach to the Design and Implementation of Microcontroller-based Universal Process Control Trainer

—This paper presents a novel approach to the design and implementation of a low-cost universal digital process control trainer. The need to equip undergraduates studying Electronic Engineering and other related courses in higher institutions with the fundamental knowledge of digital process control practical was the main objective of the work. Microcontroller-based design and implementation was the approach used where only one AT59C81 with few flip-flops were used for the whole eight processes covered by the trainer thereby justifying its low-cost and versatility. I. INTRODUCTION The basic objective in process control is to regulate the value of some quantity which means to maintain that quantity at some desired value regardless of external influences. The desired value is called the reference value or set point [2]. Inyiama H. C and Okezie C.C (2007) stated that a process control is typically a sequential logic system whose control algorithm can be represented in the form of a flow chart called an algorithmic State machine (ASM) chart [3] or in the form of State Transition Diagram (STD) [4]. The ASM chart is a diagrammatic description of the output function and the next-state function of a state machine to implement an algorithm and becomes part of the design documentation when completed. The symbols covered are the STATE BOX, THE DECISION BOX, THE CONDITIONAL OUTPUT BOX and ASM BLOCK.


INTRODUCTION
The basic objective in process control is to regulate the value of some quantity which means to maintain that quantity at some desired value regardless of external influences.The desired value is called the reference value or set point [2].Inyiama H. C and Okezie C.C (2007) stated that a process control is typically a sequential logic system whose control algorithm can be represented in the form of a flow chart called an algorithmic State machine (ASM) chart [3] or in the form of State Transition Diagram (STD) [4].The ASM chart is a diagrammatic description of the output function and the nextstate function of a state machine to implement an algorithm and becomes part of the design documentation when completed.The symbols covered are the STATE BOX, THE DECISION BOX, THE CONDITIONAL OUTPUT BOX and ASM BLOCK.
According to Clare C.R [1973], the ASM chart has three basic elements: the state, the qualifier and the conditional output [3].The need to equip undergraduates studying Electronic Engineering and other related courses in higher institutions with the fundamental knowledge of digital process control practical was the main objective of this work.The design approach used was the use of Algorithmic State machine (ASM) charts State Transition Diagrams (STD), State Transition Tables (STT), Fully Expanded STT, and Link Path Addressable ROM Structure.The significance of the work extends to the fact that it presented a standard approach to the design and implementation of the process control systems that can be applied to any process controls in the industries and it also bridges the gap created in the lives of these students due to their lack of exposure to electronics practical.
The following processes were covered by the trainer:

METHODOLOGY & DESIGN ANALYSIS
The design of the digital process control system can be achieved through various methods which include: Gate-Oriented Design which involves equation-to-gate conversions, map simplifications, output function synthesis, and next-state function synthesis, flip flops, state assignment and hazards.When such discrete logic gates (such as AND, NAND, OR, NOR, EX-OR, INVERTERS etc) and memory flip flops are used, what is termed a RANDOM LOGIC system results.Since such a system involves mostly small scale integration components, the component count is usually high for a fairly complex circuit.This implies several interconnections and many potential sources of error.Modifications and maintenance are also difficult to achieve when either redesigning or fault-finding becomes necessary.A random logic system is therefore very inflexible.
Fortunately however, logic systems can be implemented in forms more structured than random logic.Such systems employ structured logic devices such as Multiplexers (or Data Selectors) (5), and Read-Only-Memories (ROMs).
A multiplexer-based controller requires as many multiplexers as there are columns in the bit-pattern sequence to be generated and each of these multiplexers must have at least as many data input lines as there are rows in the bit-pattern sequence.Thus, if an 8-bit pattern is to be generated by means of multiplexers, a total of 64 data input lines would be involved.This is in addition to other control inputs and outputs necessary in such a system.The rapid proliferation of data input lines (and hence www.ijacsa.thesai.orgpotential sources of error) in multiplexer based complex sequential logic systems is its main disadvantage in such applications.Multiplexers being structured logic devices do, however have a considerable advantage over random logic in that errors in the design can be corrected simply by altering the logic levels applied to their data inputs.For compact, reliable and easily maintainable implementation of a complex sequential logic ROMs have an edge over multiplexers and are usually preferred.
The microcontroller-based implementation was chosen for this work due to its numerous advantage over the others which include its simplicity, and the fact that a simple control software can be developed which can be used without any modification in any control system, no matter how complex or how simple, and even when the numbers of input qualifiers, state code, size and number of output lines differ from one control system to the other, provided one input port is sufficient for Address inputs and one output port for the control pattern output.The system is made up of the hardware subsystem and software subsystem.The hardware subsystem is comprised of the input interface, the control systems and the output interface.
The Structure of the Microcontroller-based Digital Process Control is shown in Fig. 2 below.It comprise of the microcontroller with its input and output ports, the input interface subsystem connected to the input port of the microcontroller, the output interface subsystem connected to output port of the microcontroller.The input interface system comprise of all the sensors that will be used for a particular process.For example in the temperature level control system, LM 35 is the sensor, which senses the temperature of the water container.Also the output interface comprises all the transducers such as light emitting diodes, LCDs and so on.Note that buttons and keypads are part of the input subsystems since they are used for selecting the particular process to be controlled.

III. THE GENERATION OF CONTROL BIT-PATTERN SEQUENCE
The procedure that is followed for the generation of the control bit-patterns include: the drawing of ASM chart for each of the processes, transforming the ASM charts into a state transition table, and expanding the state transition table fully so that the location address and the content address for the process are generated which is then burned into the flash drive of the microcontroller.
This procedure was used for all the processes to generate the control bit-patterns in Table 3 below but the design process that led to that was illustrated in this paper by one of the processes which is the temperature level control system of water or other liquids .The ASM chart of the temperature control system is shown in Fig. 2 below.These ASM chart is then transformed into a state transition table of Table1 and then to fully expanded state transition table of Table2.ASM chart is a state box.The word (e.g ST0) enclosed in a circle at the bottom left hand corner of a state box is the state name.Here ST0 stands for state 0, and similar interpretations apply to the other states, hence ST1 Means state 1, and so on.
Each decision box has one entry path and two exit paths.The exact value of an input qualifier determines which exit path is followed out of a decision box.In the ASM chart of Fig. 2 Uth and Lth are the input qualifiers.
With the help of a K_map in which the state names are inserted serially in an adjacent cells (Fig. 2ii) and which is called a state map, the state codes are chosen such that only one bit changes level as one moves from one state of the control system to another.This is clearly brought out in the state assignment of Fig. 2iii.This method of state assignment facilitates complexity reduction when hardwired logic is the preferred technique of control system implementation and helps to prevent race hazards [3].
Every ASM chart has an equivalent tabular representation known as a State Transition Table (STT) [3].An ASM chart can be fully described in terms of the link paths comprising it.A State machine such as is represented by an ASM chart attempts to change state (i.e.transits from the present state to the next) when a clock pulse occurs.A link path is a path followed from the present state back to itself or to another state, when the clock pulse arrives.When there is an input qualifier between the present state and another, the logic level of the qualifier determines the next state the machine goes to at the clock pulse.If there is no qualifier between the present state and the next, the machine must unconditionally transit from its present state to the adjacent state in the forward direction, when a clock pulse arrives.
The ASM chart of Fig. 2i has 7 link paths labeled L1 to L7. L1 is the link path from state 0 back to itself when the input qualifier is 0. Also L2 is the link path from state 0 to state 1 when the input qualifier Lth is 1.Similarly, L3 represents the transition from state ST1 to state 2 when the qualifier Lth is 0. L4 is the transition from state2 back to itself when the input qualifier Uth is 0 and L5 is the transition from state 2 to state 0 when Lth input qualifier Uth is 1.L6 is the transition from state 1 to state 3 which is the error state where the system stays until a key is pressed to return it to state 0 through link path L7.
In the STT of Table 1 a number of dashes appear under the columns headed by the input qualifiers Lth and Uth.A dash (_) implies that the input qualifier above that column is not relevant for the transition being made in the link path shown on the STT row where the dash appeared.That input qualifier may become relevant in some other link path transition and then its value would become 0 or 1, rather than a dash.A dash in the STT also means that the input qualifier that appears as column heading for that dash may be at logic 0 without affecting the control process at that material time.

A State Transition Table (STT) is said to fully-expanded when all the dashes on each row are given all possible combination of logic values, leading to new rows in the State Transition Table, one for each combination of the logic values
for the dashes on that row.In this respect, a STT data row with one row when that (dashed) qualifier is given the logic value 0 and the other when that qualifier is given the logic level 1. Similarly a STT data row with 2 dashes expands into 4 STT rows.Assume the (dashed) qualifiers are represented by q1, q2.Then the first STT row in the expansion will give q1, q2 = 0, 0, the second would have q1, q2 = 0, 1, the third row would have q1, q2 = 1, 0, the fourth row would have q1, q2 = 1,1.Three dashes on an STT data row would in like manner lead to 8 rows in the fully expanded STT of Table 2 results.

IV.
MICROCONTROLLER-BASED IMPLEMENTATION The high capacity of ROMs relative to the number of unique bit-patterns in a fully expanded STT suggests the use of a single ROM to store the fully expanded bit-pattern of all the processes.The link-path addressable word structure is based on storing the next state and the output for each link path in the ASM charts.The next-state portion of the ROM word is called the LINK PART, while the output portion of the ROM word is called the INSTRUCTION PART.Each address is a function of the present state and qualifier inputs and called a link-path address.In general any process described by an ASM chart can be implemented with this structure, called a link-path addressable ROM.
Since a microcontroller-based implementation is used, the same link path addressable ROM patterns will be programmed into its ROM or the Erasable and Programmable ROM (i.e.EPROM) or Flash Drive (now available in newer microcontrollers).The ADDRESS inputs to the Address Decoder part of the ROM device would now be input via an input port of the microcontroller which is then used to locate the corresponding NEXT STATE and STATE OUTPUT.
When a clock pulse occurs, the NEXT STATE pattern becomes the present state pattern.This joins the input qualifiers to comprise the next Address input to be used by the microcontroller.A power-up one-shot applied to the D flip flops that feedback the Next State as the present state when a clock pulse occurs, initializes the system to state 0 at the start up [6].Thereafter, the control system behaves as defined by the ASM chart, with the help of the control software running in the microcontroller.The user may use a simple switch to stop the control software run.

A. The Control Software
A very important universal concept that is a natural outcome of the use of a fully expanded STT in a link path addressable ROM structure, as part of a microcontroller-based implementation is that a simple software can be developed which can be used without any modification in any control system, no matter how complex or how simple, and even when the numbers of the input qualifiers, state code, size and number of the output lines differs from one control system to the other, provided one input port is sufficient for address inputs and one output port for control pattern output.
The flowchart for this universally applicable control software is shown in the Fig. 3 below; with a pseudo code that explains what it does above it.
The control cycle time is the time delay required for the system to settle and become ready for the next round of inputoutput.Its default value is zero seconds.www.ijacsa.thesai.org

V. RESULTS AND DISCUSSION
A software-based universal digital process control system was achieved with the program design method presented.Following the procedure for developing a fully-expanded state transition table, which begins with representing the process in an ASM chart, developing a state transition table for the process from the ASM chart and then translating the state transition table to a fully-expanded state transition table, the fully-expanded state transition table for the other processes was also developed and all of them were shown in Table 3.The location address is the input address of the processes, which is used to locate where in the ROM memory the location content is stored.The location address and the location content will be burned into the ROM permanently.
The difference in terms of programming effort, between a software-based controller intended for just one control system and that designed for several control systems (each with a different number of input qualifiers) is minimal.Fig. 4 illustrates a typical microcontroller-based digital process control system.With this trainer the student can perform several experiments on each of the processes as covered in the laboratory manual developed for the trainer which enables him gain the needed practical knowledge on digital process control.The keyboard (Fig. 4) is used for selecting the particular process desired to be controlled.It also facilitates the input of variables or control parameters which make software-based controllers very flexible, while the LCD display enables the microcontroller to transmit responses to user commands in addition to providing the current status of the controlled device where necessary.Table 4 shows the cost implication of the project.The total cost implication of the project is 7490 NGN (Nigerian Naira).When compared to the cost implication of the same project using other methods such gate-oriented designed method, multiplexer and ROM-based design method as shown in Table 5, it is cheaper thereby justifying the cost-effectiveness of the approach used in this work.

VI. CONCLUSION
The use of a single microcontroller to control several processes, based on storing the fully expanded State Transition Tables of those processes in its ROM or flash drive makes possible the realization of a low-cost universal processes control trainer.

Figure 4 .
Figure 4.The Structure of the Microcontroller-based Digital Process Control.

Figure 5 .HHEATER
Figure 5. (i)The ASM chart of the temperature control system 2 (iii) STATE ASSIGNMENT 2 (ii) STATE MAP

Figure 6 .
Figure 6.The Flowchart rep. of the control software

TABLE 3 .
LOCATION ADDRESS & CONTENT FOR THE CONTROLLER ROM FROM THE FULLY-EXPANDED STT OF THE 8 PROCESSES..ijacsa.thesai.org Control systems  Automatic Liquid Dispenser System  Automatic Water Pump control system  Traffic Light Control System  Upper Tank Water level Control systems  Lower Tank Water level Control systems  Automatic Gate control system  Automatic Street Light Control system II.

TABLE 1 .
THE STT FOR TEMPERATURE LEVEL CONTROL.
TABLE FOR THE SYSTEM

TABLE 5 .
COST COMPARISON WITH OTHER METHODLOGIES