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Digital Object Identifier (DOI) : 10.14569/IJACSA.2014.050424
Article Published in International Journal of Advanced Computer Science and Applications(IJACSA), Volume 5 Issue 4, 2014.
Abstract: Network-on-Chip (NoC) built upon metal low-k interconnect wires, are to meet the ever stringent performance requirements in the future technology nodes. In response to this interconnection crisis, the wireless network-on-chip (WNoC), enabled by the availability of miniaturized on-chip antennas and transceivers, is envisioned one of the most revolutionary promising approach alternatives. In this paper, we present a new WNoC architecture with a layered topology, where a metal/low-k based wired network is partitioned into several subnetworks, and these subnetworks are connected through a wireless network that is overlaid on top of them. Due to limited transmission range, the wireless nodes in the wireless network actually communicate with each other in a multiple-hop fashion. As a large volume of traffic will go through the wireless nodes, a contention avoidance routing algorithm is adopted. In addition, two virtual channels have been introduced into the wireless router design to avoid any possible deadlocks that otherwise may occur. Experiment results have shown that throughput of the proposed architecture, on average, is about 20% higher than that of the existing WNoC architectures. And delay of the proposed architecture is about 30% less than the existing WNoC architectures.
Ling Wang, Zhihai Guo, Peng Lv and Yingtao Jiang, “On an Overlaid Hybrid Wire/Wireless Interconnection Architecture for Network-on-chip” International Journal of Advanced Computer Science and Applications(IJACSA), 5(4), 2014. http://dx.doi.org/10.14569/IJACSA.2014.050424