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DOI: 10.14569/IJACSA.2019.0101032
PDF

Design of an Efficient Steganography Model using Lifting based DWT and Modified-LSB Method on FPGA

Author 1: Mahesh A A
Author 2: Raja K.B

International Journal of Advanced Computer Science and Applications(IJACSA), Volume 10 Issue 10, 2019.

  • Abstract and Keywords
  • How to Cite this Article
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Abstract: The data transmission with information hiding is a challenging task in today world. To protect the secret data or image from attackers, the steganography techniques are essential. The steganography is a process of hiding the information from one channel to another in data communication. In this research work, Design of an Efficient Steganography Model using Lifting Based DWT and Modified-LSB Method on FPGA is proposed. The stegano module includes DWT (Discrete Wavelet Transformation) with lifting scheme for the cover image and encryption with Bit mapping for a secret image, an embedded module using Modified Least Significant Bit (MLSB) Method, and Inverse DWT to generate the stegano image. The recovery module includes DWT, decoding module with pixel extraction and bit retrievals, and decryption to generate the recovered secret image. The steganography model is designed using Verilog-HDL on Xilinx platform and implemented with Artix-7 Field Programmable Gate Array (FPGA). The hardware resource constraints like Area, time, and power utilization of the proposed model results are tabulated. The performance analysis of the work is evaluated using Peak Signal to Noise Ratio (PSNR) and Mean Square Error (MSE) Ratio for a different cover and secret images with better quality. The proposed steganography model operates at high speed, which improves communication performance.

Keywords: Discrete Wavelet Transformation (DWT); steganography; Modified Least Significant Bit (MLSB) Method; XOR Method; FPGA; cover image; secret image; PSNR; MSE

Mahesh A A and Raja K.B, “Design of an Efficient Steganography Model using Lifting based DWT and Modified-LSB Method on FPGA” International Journal of Advanced Computer Science and Applications(IJACSA), 10(10), 2019. http://dx.doi.org/10.14569/IJACSA.2019.0101032

@article{A2019,
title = {Design of an Efficient Steganography Model using Lifting based DWT and Modified-LSB Method on FPGA},
journal = {International Journal of Advanced Computer Science and Applications},
doi = {10.14569/IJACSA.2019.0101032},
url = {http://dx.doi.org/10.14569/IJACSA.2019.0101032},
year = {2019},
publisher = {The Science and Information Organization},
volume = {10},
number = {10},
author = {Mahesh A A and Raja K.B}
}



Copyright Statement: This is an open access article licensed under a Creative Commons Attribution 4.0 International License, which permits unrestricted use, distribution, and reproduction in any medium, even commercially as long as the original work is properly cited.

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