Performance Realization of CORDIC based GMSK System with FPGA Prototyping

The Gaussian Minimum Shift Keying (GMSK) modulation is a digital modulation scheme using frequency shift keying with no phase discontinuities, and it provides higher spectral efficiency in radio communication systems. In this article, the cost-effective hardware architecture of the GMSK system is designed using pipelined CORDIC and optimized CORDIC models. The GMSK systems mainly consist of the NRZ encoder, Integrator, Gaussian filter followed by FM Modulator using CORDIC models and Digital Frequency Synthesizer (DFS) for IQ Modulation in transmitter section along with channel, the receiver section has FM demodulator, followed by Differentiator and NRZ decoder. TheCORDIC algorithms play a crucial role in GMSK systems for IQ generation and improve the system performance on a single chip. Both the pipelined CORDIC and optimized CORDIC models are designed for 6-stages. The optimized CORDIC model is designed using quadrature mapping method along with pipeline structure. The GMSK systems are implemented on Artix-7 FPGA with FPGA prototyping. The Performance analysis is represented in terms of hardware constraints like area, time and power. These results show that the optimized CORDIC based GMSK system is a better option than the pipelined CORDIC based GMSK systems for real-time scenarios.

@article{Kajur2020,
  title     = {Performance Realization of CORDIC based GMSK System with FPGA Prototyping},
  journal   = {International Journal of Advanced Computer Science and Applications},
  volume    = {11},
  number    = {1},
  year      = {2020},
  publisher = {The Science and Information Organization},
  author    = {Renuka Kajur and K V Prasad},
  doi       = {10.14569/IJACSA.2020.0110172},
  url       = {https://doi.org/10.14569/IJACSA.2020.0110172}
}