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Research Article | Open Access |

LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform

Author 1: Bharathi R Author 2: N. Parvatham
International Journal of Advanced Computer Science and Applications (IJACSA) · Vol. 11, No. 1 · Published 2020 · Cited by 5

DOI: 10.14569/IJACSA.2020.0110189

Abstract

The Internet of Things (IoT) is one of the emerging technology in today’s world to connect billions of electronic devices and providing the data security to these electronic devices while transmission from the attacks is a big challenging task. These electronic devices are smaller and consume less power. The conventional security algorithms are complex with its computations and not suitable for IoT environments. In this article, the hardware architecture of the new Lightweight encryption algorithm (LEA) for the secured Internet of things (SIoT) is designed, which includes Encryption, decryption along with key generation process. The New LEA-SIoT is a hybrid combination of the Feistel networks and Substitution-permutation Network (SPN). The encryption/decryption architecture is the composition of Logical operations, substitution transformations, and swapping. The encryption/decryption process is designed for 64-bit data input and 64-bit key inputs. The key generation process is designed with the help of KHAZAD block cipher algorithm. The encryption and key generation process are executing in parallel with pipelined architecture with five rounds to improve the hardware and computational complexity in IoT systems. TheLEA-SIoT is designed on the Xilinx platform and implemented on Artix-7 FPGA. The hardware constraints like area, power, and timing utilization are summarized. The Comparison of the LEA-SIoT with similar security algorithms is tabulated with improvements.

Keywords

How to Cite this Article

R, B., & Parvatham, N. (2020). LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform. International Journal of Advanced Computer Science and Applications, 11(1). https://doi.org/10.14569/IJACSA.2020.0110189

R, Bharathi, and N. Parvatham. "LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform." International Journal of Advanced Computer Science and Applications, vol. 11, no. 1, 2020, https://doi.org/10.14569/IJACSA.2020.0110189.

@article{R2020,
  title     = {LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform},
  journal   = {International Journal of Advanced Computer Science and Applications},
  volume    = {11},
  number    = {1},
  year      = {2020},
  publisher = {The Science and Information Organization},
  author    = {Bharathi R and N. Parvatham},
  doi       = {10.14569/IJACSA.2020.0110189},
  url       = {https://doi.org/10.14569/IJACSA.2020.0110189}
}

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Call for Papers - Important Dates

Volume 17 No. 11, November 2026
Paper Submission Due October 25, 2026
Review Notification November 15, 2026
Publication Date November 30, 2026