LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform
DOI: 10.14569/IJACSA.2020.0110189
Abstract
Keywords
How to Cite this Article
R, B., & Parvatham, N. (2020). LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform. International Journal of Advanced Computer Science and Applications, 11(1). https://doi.org/10.14569/IJACSA.2020.0110189
R, Bharathi, and N. Parvatham. "LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform." International Journal of Advanced Computer Science and Applications, vol. 11, no. 1, 2020, https://doi.org/10.14569/IJACSA.2020.0110189.
@article{R2020,
title = {LEA-SIoT: Hardware Architecture of Lightweight Encryption Algorithm for Secure IoT on FPGA Platform},
journal = {International Journal of Advanced Computer Science and Applications},
volume = {11},
number = {1},
year = {2020},
publisher = {The Science and Information Organization},
author = {Bharathi R and N. Parvatham},
doi = {10.14569/IJACSA.2020.0110189},
url = {https://doi.org/10.14569/IJACSA.2020.0110189}
}
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