Abstract: The demand for low power dissipation and increasing speed elicits numerous research efforts in the field of nano CMOS technology. The Arithmetic Logic Unit is the core of any central processing unit. In this paper, we designed a 4-bit Arithmetic and Logic Unit (ALU) using Single Electron Transistor (SET). Single-electron transistor (SET) is a new type of switching nanodevice that uses controlled single-electron tunneling to amplify the current. The single-electron transistor (SET) is highly scalable and possesses ultra-low power consumption when compared to conventional semiconductor devices. Reversible logic gates designed using SET are used for performing 4-bit arithmetic operations. We modelled symmetric single gate SET operating at room temperature using Verilog A code. The design is carried out in cadence simulation environment. The 4-bit SET based ALU design exhibits the power of 0.52 nW and delay of 350pS.

Aarthy M and Sriadibhatla Sridevi, “Design and Analysis of an Arithmetic and Logic Unit using Single Electron Transistor” International Journal of Advanced Computer Science and Applications(IJACSA), 11(2), 2020. http://dx.doi.org/10.14569/IJACSA.2020.0110216

@article{M2020,
title = {Design and Analysis of an Arithmetic and Logic Unit using Single Electron Transistor},
journal = {International Journal of Advanced Computer Science and Applications},
doi = {10.14569/IJACSA.2020.0110216},
url = {http://dx.doi.org/10.14569/IJACSA.2020.0110216},
year = {2020},
publisher = {The Science and Information Organization},
volume = {11},
number = {2},
author = {Aarthy M and Sriadibhatla Sridevi}
}