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RETRACTED: FPGA-Based Design of High-Speed CIC Decimator for Wireless Applications
International Journal of Advanced Computer Science and Applications(IJACSA), Volume 2 Issue 5, 2011.
Abstract: After careful and considered review of the content of this paper by a duly constituted expert committee, this paper has been found to be in violation of IJACSA`s Publication Principles. We hereby retract the content of this paper. Reasonable effort should be made to remove all past references to this paper. Retraction DOI: 10.14569/IJACSA.2011.020510.retraction
Keywords: CIC; FPGA; FPGA; GSM; LUT; SDR
Rakjesh Mehra and Rashmi Arora. “RETRACTED: FPGA-Based Design of High-Speed CIC Decimator for Wireless Applications”. International Journal of Advanced Computer Science and Applications (IJACSA) 2.5 (2011). http://dx.doi.org/10.14569/IJACSA.2011.020510
@article{Mehra2011,
title = {RETRACTED: FPGA-Based Design of High-Speed CIC Decimator for Wireless Applications},
journal = {International Journal of Advanced Computer Science and Applications},
doi = {10.14569/IJACSA.2011.020510},
url = {http://dx.doi.org/10.14569/IJACSA.2011.020510},
year = {2011},
publisher = {The Science and Information Organization},
volume = {2},
number = {5},
author = {Rakjesh Mehra and Rashmi Arora}
}
Copyright Statement: This is an open access article licensed under a Creative Commons Attribution 4.0 International License, which permits unrestricted use, distribution, and reproduction in any medium, even commercially as long as the original work is properly cited.
