On FPGA Implementation of a Continuous-Discrete Time Observer for Sensorless Induction Machine using Simulink HDL Coder
DOI: 10.14569/IJACSA.2017.080655
Abstract
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How to Cite this Article
Besbes, M., Sad, S. H., M’Sahli, F., & Farza, M. (2017). On FPGA Implementation of a Continuous-Discrete Time Observer for Sensorless Induction Machine using Simulink HDL Coder. International Journal of Advanced Computer Science and Applications, 8(6). https://doi.org/10.14569/IJACSA.2017.080655
Besbes, Moez, et al.. "On FPGA Implementation of a Continuous-Discrete Time Observer for Sensorless Induction Machine using Simulink HDL Coder." International Journal of Advanced Computer Science and Applications, vol. 8, no. 6, 2017, https://doi.org/10.14569/IJACSA.2017.080655.
@article{Besbes2017,
title = {On FPGA Implementation of a Continuous-Discrete Time Observer for Sensorless Induction Machine using Simulink HDL Coder},
journal = {International Journal of Advanced Computer Science and Applications},
volume = {8},
number = {6},
year = {2017},
publisher = {The Science and Information Organization},
author = {Moez Besbes and Salim Hadj Sad and Faouzi M’Sahli and Monther Farza},
doi = {10.14569/IJACSA.2017.080655},
url = {https://doi.org/10.14569/IJACSA.2017.080655}
}
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