BulkSort: System Design and Parallel Hardware Implementation Considerations

Algorithms are commonly perceived as difficult subjects. Many applications today require complex algorithms. However, the researchers look for ways to make them as simple as possible. In high time demanding fields, the process of sorting represents one of the foremost issues in the data structure for searching and optimization algorithms. In parallel processing, we divide program instructions among multiple processors by breaking problems into modules that can be executed in parallel, to reduce the execution time. In this paper, we proposed a novel parallel, re-configurable and adaptive sorting network of the BulkSort algorithm. Our architecture is based on simple and elementary operations such as comparison and binary shifting. The main strength of the proposed solution is the ability to sort in parallel without memory usage. Experimental results show that our proposed model is promising according to the required resources and its ability to perform a high-speed sorting process. In this study, we take into account the analysis result of the Simulink design to establish the required hardware resources of the proposed system.

@article{Ihirri2019,
  title     = {BulkSort: System Design and Parallel Hardware Implementation Considerations},
  journal   = {International Journal of Advanced Computer Science and Applications},
  volume    = {10},
  number    = {12},
  year      = {2019},
  publisher = {The Science and Information Organization},
  author    = {Soukaina Ihirri and Ahmed Errami and Mohammed Khaldoun and Essaid Sabir},
  doi       = {10.14569/IJACSA.2019.0101284},
  url       = {https://doi.org/10.14569/IJACSA.2019.0101284}
}